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TSMC's Cross-Node Strategy Keeps AI Chip Supply Moving

TSMC's cross-node utilization strategy lets older fabs support newer chip production—and a fleet of trucks is holding it all together while new fabs come online.

Bob Reynolds

Written by AI. Bob Reynolds

August 17, 20267 min read
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A yellow and black truck with Chinese characters on its cargo bed drives on a highway, with an "Asianometry" logo in the…

Photo: AI. Ren Takahashi

The AI chip shortage has a timing problem that no amount of money can fully solve. According to TSMC's investor guidance, the company has committed over $60 billion in capital expenditure for 2026 across simultaneous fab builds in Hsinchu, Kaohsiung, and Taitung. TSMC CEO C.C. Wei has said publicly that spending deployed in 2026 won't translate into production capacity until 2028 at the earliest. Nvidia wants chips now. Apple wants chips now. The hyperscalers building out data centers for large language models want chips now. The gap between "now" and 2028 is not a rounding error — it's the central operational problem facing the most important manufacturer in the global technology supply chain.

So how does TSMC keep up in the meantime? The answer starts with understanding what a process node actually is, which turns out to be considerably more slippery than the marketing suggests.

The Node Is Not What You Think It Is

"One of the worst kept secrets in semiconductor manufacturing," Asianometry notes in a recent breakdown of TSMC's production strategy, "is that logic process node names mean nothing."

That's a provocation, but it's not wrong. When TSMC develops a node, its R&D team assembles a collection of manufacturing technologies and packages them for specific customers at a negotiated price. The result is a roadmap that looks less like a clean progression and more, as Asianometry puts it, "like ASCII art" — N3 splinters into N3E, N3P, N3X, and N3C; N2 forks into N2P, N2X, and A16. These aren't arbitrary marketing names. Each variant reflects real engineering tradeoffs made for specific customer requirements.

More importantly for what follows: the manufacturing process itself is layered, literally. A chip is built from the bottom up — transistors first, then successive layers of metal interconnects that carry power and data signals across the die. The finest, most critical wires sit at the lowest metal layers. As you move up through the stack, the interconnects get coarser and the manufacturing tolerances loosen.

The implication, which Asianometry has surfaced from analyst call statements spanning nearly a decade, is that different process nodes share a substantial fraction of their manufacturing steps. The tools that handle the upper metal layers of an N5 chip aren't all that different from the tools that handle the upper metal layers of an N7 chip. In 2015, then-co-CEO Mark Liu stated in an analyst call that TSMC's 20-nanometer and 16-nanometer nodes had 95% tool overlap. In 2018, co-CEO C.C. Wei stated in a separate analyst call that N10, N7, and N7 Plus shared 90% tool overlap, with CFO Laura Ho adding that the overlap from N7 to N5 would again exceed 90%. These figures come through Asianometry's reporting on the underlying earnings calls.

The practical meaning: a fab built for one node isn't locked into that node forever. Much of its equipment can serve the next generation.

The Stranding Problem

TSMC's traditional operating model — build a new fab for each new process node — creates a structural vulnerability. When a major customer like Apple migrates from N7 to N5, enormous production volumes move with them, from TSMC's Taichung fabs to the newer Tainan complex. The Taichung facility is left with a utilization hole that may be impossible to fill at that node's price point.

N7 is the clearest current example of a node caught between generations. It's too old and too far from the leading edge to attract high-performance compute customers who will reach for N3 instead. But it's too expensive and complex for cost-sensitive customers who'd rather use mature 28-nanometer planar processes. When post-COVID demand collapsed in 2023, Taichung's N7 fabs reportedly dropped below 70% utilization — the rough threshold below which a fab stops earning back its capital costs. A fab that can't earn back its investment is a stranded asset.

Intel's answer to this problem is architectural: build one large shell and upgrade the tooling over time as nodes advance. The logic is clean — you never have excess capacity at a node nobody wants, because you simply move the whole facility to the next node. The tradeoff is that Intel services its own products almost exclusively, so it can afford to retire old nodes aggressively. TSMC serves hundreds of customers across decades-long product cycles. Some of those customers legitimately need chips on a node that's ten years old.

Cross-Node Utilization as the Bridge

The solution TSMC has been quietly developing for at least a decade is to manage families of nodes — those with high tool overlap — as a single shared pool of capacity rather than as isolated facilities. If a customer moves from 20nm to 16nm, TSMC doesn't need to build new capacity; it converts existing 20nm tooling. The 95% overlap means the conversion cost is manageable relative to a greenfield fab.

With AI demand straining N3 capacity specifically, TSMC has been converting N5 equipment to N3 — accepting a gross margin hit in the near term to satisfy customers who cannot wait for new fab phases to come online. This is the cross-node strategy operating under pressure rather than in the normal course of business.

There's one obvious problem with that plan: Taichung is roughly 100 miles from Tainan.

N5 and N3 are both housed inside Fab 18 in Tainan, connected by a wafer bridge that makes cross-node conversion relatively straightforward. N7, sitting in Taichung, is a different matter. In early 2025, C.C. Wei indicated that converting N7 capacity directly to N3 would be far harder given both the greater tool divergence and the physical distance. A year later, his position had shifted: TSMC had figured out how to use N7 capacity to support N5, which shares approximately 90% tool overlap with it — and which in turn frees up additional N5 capacity in Tainan to be converted toward N3.

The Trucks

The mechanism for making this work across 100 miles of Taiwanese highway is unglamorous.

TSMC already moves finished wafers between its front-end fabs and its advanced packaging facilities by truck — ordinary freight vehicles carrying FOUPs full of wafers worth tens of millions of dollars, navigating the same roads as every other commercial vehicle in Taiwan. TSMC's 2020 ESG report documents the company's use of freight truck logistics for wafer transport. Asianometry notes, with visible amusement, that these trucks are identifiable mainly by a TSMC logo.

The cross-node solution scales this up. Tainan fabs handle the critical lower layers — the transistor-level work where node differentiation actually lives, the steps that demand the newest EUV tools and the tightest process control. Once those layers are complete, the unfinished wafers go into FOUPs, FOUPs go into trucks, and the trucks head north to Taichung. The N7/N6 fabs there — tooled for the upper metal layers that N5 and N7 largely share — finish the job. Tainan's machines stay focused on the work only they can do. Taichung's machines, which might otherwise sit underutilized, run the back-end-of-line steps that their tooling handles just fine.

The world's most advanced semiconductor supply chain, backstopping a multi-trillion-dollar AI buildout, is being held together in part by trucks on the freeway.

As Asianometry observes: "Imagine that — the world's largest infrastructure build-out, the foundation of the AI ecosystem, is dependent on a fleet of low-tech trucks hoofing it on Taiwan's highways."

What This Actually Tells You

Cross-node utilization is not a headline strategy. C.C. Wei has been mentioning it in earnings calls for years, and it rarely gets the attention it deserves precisely because it's operational detail rather than vision-statement material. But it reveals something important about how TSMC maintains its competitive position.

No other contract manufacturer has the density of installed equipment across enough fabs to make this kind of cross-node pooling viable. No other manufacturer has the geographic concentration — multiple major facilities within a few hours' drive of each other — to make the logistics work. The strategy is only possible because of decisions made over decades about where to build, what to build, and how to structure the relationships between facilities.

The new fabs in Hsinchu, Kaohsiung, and Taitung will eventually come online and add genuine capacity. But between now and 2028, the trucks keep rolling. That's not a gap-filler. That's the supply chain.


Bob Reynolds is Senior Technology Correspondent at BuzzRAG.

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