Bolt Graphics Wants to Build a GPU That Rivals Nvidia

Every few years, someone announces they're going to build a GPU and compete with Nvidia. The graveyard of those ambitions is well-populated. So when Bolt Graphics founder and CEO Darwesh Singh sat down with Gamers Nexus host Steve Burke to walk through his company's plans, the appropriate baseline posture is informed skepticism—not dismissal, not hype. Just: okay, show me what you've got.

What Bolt has right now is a render of a card that looks genuinely strange, a 12nm test chip taped out earlier this year as proof-of-concept silicon, active work on a full 5nm design, and an FPGA simulation rig running path tracing in Blender at agonizing speed. It is not a product. It is, however, more than a slide deck—and in GPU startup terms, that distinction matters.

The Card That Looks Like a Computer

The first thing anyone notices about the Bolt Zeus GPU render is that it doesn't look like a GPU. There are two DDR5 SO-DIMM slots—the kind of memory in laptops. There's LPDDR5X soldered to the board. There's an RJ45 Ethernet port. There are PCIe connectors on both ends of the card. Burke's on-camera reaction was essentially: what is happening here?

Singh's explanations are actually coherent once you hear them. The SO-DIMM slots mean users can expand their own GPU memory—8GB, 16GB, 32GB, 48GB DIMMs, whatever they want to buy. The LPDDR5X and DDR5 live in a unified memory address space, so applications fill fast soldered memory first and spill to the user-installed DIMMs. The second PCIe connector is for linking multiple Zeus GPUs together with a cheap, passive ribbon cable—a non-proprietary SLI-style interconnect without the proprietary tax. The Ethernet port is a BMC interface for remote management: flash firmware, pull telemetry, restart devices, which makes more sense in a home lab or small data center cluster than it does in a single gaming rig.

The deeper design philosophy here is that Bolt isn't building what Singh calls a "host-device programming model"—where a CPU sits on one side of a PCIe bus copying memory to a separate GPU accelerator. The Zeus is architected more like a tightly coupled vector processor with an out-of-order RISC-V scalar core at its center, vector cores hanging off that (FP64 capable, with FP32/FP16 packed precision), and dedicated hardware accelerators for ray tracing, physics simulation, and special math functions. Singh describes it as "a single board computer" that happens to do GPU things—and can, in fact, run Linux.

The licensed CPU core (Singh couldn't say from whom) is RISC-V, and that is both the most interesting and the most consequential architectural choice Bolt has made. It is interesting because RISC-V's open ISA gives a startup room to maneuver that x86 licensing never would. It is consequential because anything that runs on the Zeus has to run on RISC-V—which means porting work, which means the software problem, which is the part that has eaten every GPU newcomer alive.

The Intel Arc Problem, Inverted

Singh is clearly aware of how badly Intel's Arc rollout went. He referenced it directly: "Going straight to gaming is a little bit hard because there are so many games you have to support. The market's very large. The market's very vocal."

Intel's approach with Arc was to throw enormous resources at the problem—thousands of engineers, aggressive driver work—and still spend years digging out from the software hole before Battle Mage earned reasonably decent reviews. Bolt's answer to the same problem is structural rather than resource-based: they're not going to gaming first. They're targeting 3D artists, animators, game developers, and workstation users—a much smaller, more technically sophisticated audience that can work closely with Bolt and absorb early rough edges. The hope is that developers building on Bolt hardware will eventually build games that target it.

It's the classic developer-ecosystem bootstrapping strategy. It worked for Apple Silicon. It worked, eventually, for AMD's chiplet architecture. It's also failed for a lot of people. The success case requires that your hardware be compelling enough that professional users tolerate the friction of a new platform.

Which brings us to what Bolt is actually betting on.

The Ray Tracing Gamble

Bolt's architecture trades rasterization performance for path tracing performance—and Singh is explicit about this being a deliberate choice rather than an incidental one. The Zeus is designed from the ground up for ray intersections; rasterization is supported but not the priority. Singh showed a benchmark chart comparing ray-triangle intersection rates at 4K/120fps against current GPUs, including the RTX 5090. The claim is that Bolt's hardware would offer substantially more path tracing headroom per pixel per frame than anything currently available.

Burke flagged the obvious tension: "When I saw this the first time, definitely there's skepticism—okay, new company I've never really heard of comes in and says they're better than Nvidia, at least at this thing." It's a narrowly scoped benchmark targeting the one workload Bolt is specifically optimized for. That's worth holding in mind.

But the strategic logic underneath it is genuinely interesting. Singh pointed out that Nvidia's ray tracing hardware was, in his words, "bolted on" after 2018—added to an architecture that was fundamentally oriented around rasterization. Bolt doesn't carry that legacy. Every design decision assumes path tracing is the destination.

Here's the irony that Burke surfaced: if Nvidia successfully drags the games industry toward ray tracing—which Nvidia has every incentive to do—it pulls the market toward exactly the terrain where a purpose-built RT architecture would be most competitive. Nvidia pushing ray tracing potentially benefits Bolt more than it benefits AMD. "It benefits Nvidia to push for ray tracing," Burke noted, "but that also does push them toward where it sounds like you'll be better set up." Singh's response: "Yep. Absolutely."

Whether that bet pays off depends on a lot of things Bolt doesn't control: whether ray tracing sentiment among consumers shifts from "expensive and annoying" to "worth it," and how quickly the industry actually moves.

Memory, Margins, and the Reality Check

The memory architecture is clever in a bootstrapping-startup kind of way. LPDDR5X is available in massive volume because it's in every smartphone. DDR5 SO-DIMMs are in every laptop. Neither is as exotic or supply-constrained as GDDR6X or HBM, which means Bolt can actually get its hands on the stuff without the supplier relationships that only Nvidia and AMD have earned over decades.

The trade-off is bandwidth. LPDDR5X and DDR5 are slower than GDDR6X or HBM. Bolt's answer is cache: Singh claims their on-chip cache per ALU is more than 10 times what comparable Nvidia silicon carries, which keeps more data close to the compute and reduces how often they need to reach out to slower DRAM. He also noted that latency on their memory architecture is actually better than HBM or GDDR—around 100 nanoseconds—because of how close the memory sits to the compute elements.

The memory situation has, however, already bitten them. Singh acknowledged that the HBM shortage during AI infrastructure buildout affected their cost targets: "Memory pricing has changed our gross margin a little bit." Their choice of more commodity memory insulated them somewhat, but not entirely.

Bolt started in 2020—COVID year, in the middle of the supply chain chaos that would follow. They've been working on this for almost six years. A 12nm test chip is done. A 5nm full chip is scheduled to tape out by end of 2025, with mass production targeted for end of 2026. Fifteen thousand people have expressed interest in early access; Bolt plans to onboard the first 10 at a time via an emulator cluster this year.

What the Demo Actually Shows

The "functional demo" is an FPGA-based prototype—an AMD Xilinx U50 board running Bolt's hardware description at around 100-200MHz, far below the speeds a real chip would run. The demo showed Blender's Cycles renderer path-tracing a scene through Bolt's custom plugin. It was slow. Singh was clear that this is expected: the FPGA isn't the GPU, it's a prototype environment for iterating on hardware design before the enormous cost of tape-out.

That's a legitimate and standard part of chip development. It is not a shipping product, and nothing about the demo suggests otherwise. What it does show is that Bolt's path tracing implementation produces recognizably correct output—the image converges as samples accumulate—and that they've built real software integration with at least one production tool.

Bolt is also a patron sponsor of the Blender Foundation, which is a smart move: it signals intent to the community they most need to win over, at a relatively low cost.

Singh mentioned an upcoming SIGGRAPH keynote and a planned appearance through distributors alongside website sales for the mass production push next year. The next real test of Bolt's claims won't be a benchmark slide or an FPGA demo—it'll be whether a 5nm chip actually tapes out on schedule, whether it clocks where they think it will, and whether any of those 15,000 people in line still care by the time cards actually ship.

GPU startups don't usually die from bad ideas. They die from the gap between the architecture and the software ecosystem needed to make it matter. Singh knows this—he spent a chunk of the interview demonstrating that he knows this. Whether knowing the trap is enough to avoid it is a different question entirely.

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— Dev Kapoor, Open Source & Developer Communities Correspondent, Buzzrag